CoDeveloper(Impulse C)

FPGAデザイン・コンペティションにライセンスを提供

この度下記2つのFPGAデザイン・コンペティションの参加者に、
ライセンスを提供させていただくこととなりましたのでお知らせ致します。

• ICFPT2013 Design Competition
• IEICE RECONF DESIGN CONTEST 2013

大会参加者でライセンス希望の方は
email：ilink_sales@ilink.co.jp
までお問合せください。

以下、大会事務局と Impulse Accelerated Technologies社によるプレスリリース

For immediate release

2013/2/22

ICFPT 2013 Design Competition Shows Off Student Programming Skills Impulse C to FPGA helps sponsor this annual event supporting students. Dateline Kyoto Japan, 22 February 2013. International Conference on Field ProgrammableTechnology 2013 Design Competition (http://lut.eee.u-ryukyu.ac.jp/dc13/), Blokus Duo, is a clever competition which encourages students to create powerful system on chip designs using FPGA (field programmable gate arrays). System on Chip refers to the ability to combine most of the elements of a given design on a single device, an FPGA. An FPGA is a processor type, different from a standard Intel or AMD processor, which enables the user to configure the computer area on the chip, and add in the peripheral functions.

FPGAs are a good competition platform because they create a fair competition where each engineer has access to the same computing power. But unlike standard microprocessors they offer the student a chance to construct their own processor design. The Blokus competition is a fun way to exhibit serious programming skills. Hardware/software codesign in which both elements are 'frozen' together , C to FPGA compilation, Clock cycle reduction, leveraging existing software modules, all pretty advanced techniques.

The part that Impulse is contributing, C to FPGA compilation, enables software developers (in contrast to hardware engineers) to optimally reconfigure the FPGA hardware for their specific design. Impulse C does this by 'cross compiling' C to VHDL, which is the hardware programming language required by the FPGA. It also optimizes code by parallelizing the streaming C into multiple streaming processes. This enables the FPGA to outperform a CPU which has a nominally faster clock speed.

Professor Tomonori Izumi, Department of Electronic and Computer Engineering, Ritsumeikan University explains, "An FPGA is one of the key devices to accelerate computations with maximal flexibility in processing architecture and recent progress in the technology of device, design, and design methodology which enhances the applicable field of the accelerators. In the competition, we try to apply FPGAs to artificial intelligence or expert system for a board game named 'Blokus Duo'."

"Compared to the conventional accelerators which execute massive but regular computations like image processing, the game player requires a heterogeneous combination of irregular computations. A first design effort is not likely to be a tune-up like 'the module achieves 50% fewer clock cycles', but a major architectural advancement like 'the algorithm reduces the time complexity from O(n^2) to O(n log n)'."

"Hardware design languages do let people develop highly tuned designs, deriving all the merit of FPGA's flexibility .... but at the cost of tremendous design time. High-level synthesis tools are necessity for FPGAs to be applied to such complicated computations."

"The program managers would like to express to iLink and Impulse Accelerated Technologies our deep gratitude for the support with Impulse C/CoDeveloper and we wish this competition will be a Hogwarts for the next generation of wizards having both algorithmic and architectural skills."

"We enjoy supporting student competitions like ICFPT 2013" said Brian Durwood, CEO of Impulse Accelerated Technologies. He continued, "We are often surprised by the quality and ingenuity of the students. Frequently some of the student modules are good enough to be included in the Impulse C free module library." "We also believe The Institute of Electronics, Information and Communication Engineers the Technical Workgroup of Reconfigurable Systems http://www.cs.tsukuba.ac.jp/~yoshiki/FPGA/Contest_eng/index.php is doing a good job to support this type of work." Ahead of ICFPT2013, another Blokus competition will be held as a part of IEICE RECONF workshop at Kanazawa.
Impulse C tools help software developers reconfigure C algorithms for compilation to FPGA. In this process the algorithms are converted from single-stream to multiple streaming processes, accelerating them 10- to 100-times. Users include Canon, Hitachi, Honda, NASA, Sanyo, Sharp and Toyota. Interested engineers can get more information or a free trial of the software by contacting iLink ilink_sales@ilink.co.jp

Note:
ICFPT (http://www.icfpt.org/)

Trademark disclaimer: The trademark Blokus and other trademarks referred to are property of their respective trademark holders. The trademark holders are not affiliated with the ICFPT competition.